LoopUnrollDynamicIndexing.lgc

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; RUN: lgc -mcpu=gfx1030 -v -o /dev/null 2>&1 - <%s | FileCheck --check-prefixes=CHECK %s
; CHECK-LABEL: {{^// LLPC}} LGC before-lowering results
; CHECK: [[LOOP9:![0-9]+]] = distinct !{[[LOOP9]], [[META10:![0-9]+]], [[META11:![0-9]+]]}
; CHECK: [[META10]] = !{!"llvm.loop.unroll.count", i32 11}
; CHECK: [[META11]] = !{!"llvm.loop.disable_nonforced"}

; REQUIRES: do-not-run-me

; ModuleID = 'llpc_fragment_7'
source_filename = "llpc_fragment_7"
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7:8:9-p32:32:32-p64:32:32-p65:32:32"
target triple = "amdgcn--amdpal"

; Function Attrs: alwaysinline nounwind
define dllexport spir_func void @main() local_unnamed_addr #0 !spirv.ExecutionModel !0 !lgc.shaderstage !1 {
.entry:
  %0 = alloca [10 x <4 x float>], align 16, addrspace(5)
  br label %1

1:                                                ; preds = %3, %.entry
  %s.0 = phi <4 x float> [ zeroinitializer, %.entry ], [ %s.0.vec.insert, %3 ]
  %i.0 = phi i32 [ 0, %.entry ], [ %33, %3 ]
  %2 = icmp slt i32 %i.0, 10
  br i1 %2, label %3, label %34

3:                                                ; preds = %1
  %4 = and i32 %i.0, 15
  %5 = add nsw i32 %4, -8
  %6 = insertelement <2 x i32> poison, i32 %i.0, i64 0
  %7 = insertelement <2 x i32> %6, i32 %5, i64 1
  %8 = sitofp <2 x i32> %7 to <2 x float>
  %9 = fmul reassoc nnan nsz arcp contract afn <2 x float> %8, splat (float 6.250000e-02)
  %10 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 0, i32 0, i32 0, i32 144, <2 x float> %9)
  %11 = insertelement <4 x float> poison, float %10, i64 0
  %12 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 1, i32 0, i32 0, i32 144, <2 x float> %9)
  %13 = insertelement <4 x float> poison, float %12, i64 0
  %14 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 2, i32 0, i32 0, i32 144, <2 x float> %9)
  %15 = insertelement <4 x float> poison, float %14, i64 0
  %16 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 3, i32 0, i32 0, i32 144, <2 x float> %9)
  %17 = insertelement <4 x float> poison, float %16, i64 0
  %18 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 4, i32 0, i32 0, i32 144, <2 x float> %9)
  %19 = insertelement <4 x float> poison, float %18, i64 0
  %20 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 5, i32 0, i32 0, i32 144, <2 x float> %9)
  %21 = insertelement <4 x float> poison, float %20, i64 0
  %22 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 6, i32 0, i32 0, i32 144, <2 x float> %9)
  %23 = insertelement <4 x float> poison, float %22, i64 0
  %24 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 7, i32 0, i32 0, i32 144, <2 x float> %9)
  %25 = insertelement <4 x float> poison, float %24, i64 0
  %26 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 8, i32 0, i32 0, i32 144, <2 x float> %9)
  %27 = insertelement <4 x float> poison, float %26, i64 0
  %28 = call reassoc nnan nsz arcp contract afn float (...) @lgc.create.read.generic.input.f32(i32 0, i32 9, i32 0, i32 0, i32 144, <2 x float> %9)
  %29 = insertelement <4 x float> poison, float %28, i64 0
  store <4 x float> %11, ptr addrspace(5) %0, align 16
  %.fca.1.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 16
  store <4 x float> %13, ptr addrspace(5) %.fca.1.gep, align 16
  %.fca.2.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 32
  store <4 x float> %15, ptr addrspace(5) %.fca.2.gep, align 16
  %.fca.3.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 48
  store <4 x float> %17, ptr addrspace(5) %.fca.3.gep, align 16
  %.fca.4.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 64
  store <4 x float> %19, ptr addrspace(5) %.fca.4.gep, align 16
  %.fca.5.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 80
  store <4 x float> %21, ptr addrspace(5) %.fca.5.gep, align 16
  %.fca.6.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 96
  store <4 x float> %23, ptr addrspace(5) %.fca.6.gep, align 16
  %.fca.7.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 112
  store <4 x float> %25, ptr addrspace(5) %.fca.7.gep, align 16
  %.fca.8.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 128
  store <4 x float> %27, ptr addrspace(5) %.fca.8.gep, align 16
  %.fca.9.gep = getelementptr inbounds nuw i8, ptr addrspace(5) %0, i32 144
  store <4 x float> %29, ptr addrspace(5) %.fca.9.gep, align 16
  %s.0.vec.extract = extractelement <4 x float> %s.0, i64 0
  %30 = getelementptr [10 x <4 x float>], ptr addrspace(5) %0, i32 0, i32 %i.0, i32 0
  %31 = load float, ptr addrspace(5) %30, align 4
  %32 = fadd reassoc nnan nsz arcp contract afn float %s.0.vec.extract, %31
  %s.0.vec.insert = insertelement <4 x float> %s.0, float %32, i64 0
  %33 = add i32 %i.0, 1
  br label %1, !llvm.loop !2

34:                                               ; preds = %1
  %__llpc_input_proxy_frag_color.12.vec.insert = shufflevector <4 x float> %s.0, <4 x float> <float poison, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
  call void (...) @lgc.create.write.generic.output(<4 x float> %__llpc_input_proxy_frag_color.12.vec.insert, i32 0, i32 0, i32 0, i32 0, i32 0, i32 poison)
  ret void
}

; Function Attrs: nounwind willreturn memory(read)
declare !lgc.create.opcode !3 float @lgc.create.read.generic.input.f32(...) local_unnamed_addr #1

; Function Attrs: nounwind willreturn memory(read)
declare !lgc.create.opcode !3 <4 x float> @lgc.create.read.generic.input.v4f32(...) local_unnamed_addr #1

; Function Attrs: nodivergencesource nounwind
declare !lgc.create.opcode !4 void @lgc.create.write.generic.output(...) local_unnamed_addr #2

attributes #0 = { alwaysinline nounwind "denormal-fp-math-f32"="preserve-sign" }
attributes #1 = { nounwind willreturn memory(read) }
attributes #2 = { nodivergencesource nounwind }

!0 = !{i32 4}
!1 = !{i32 6}
!2 = distinct !{!2}
!3 = !{i32 74}
!4 = !{i32 77}