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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --tool lgc --version 5
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
; Copyright (c) 2024-2025 Advanced Micro Devices, Inc. All Rights Reserved.
;
; Permission is hereby granted, free of charge, to any person obtaining a copy
; of this software and associated documentation files (the "Software"), to
; deal in the Software without restriction, including without limitation the
; rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
; sell copies of the Software, and to permit persons to whom the Software is
; furnished to do so, subject to the following conditions:
;
; The above copyright notice and this permission notice shall be included in all
; copies or substantial portions of the Software.
;
; THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
; IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
; FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
; AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
; LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
; FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
; IN THE SOFTWARE.
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; Test that invalid image descriptor patching is applied where required.
; RUN: lgc -mcpu=gfx1010 -print-after=lgc-apply-workarounds -o - %s 2>&1 | FileCheck --check-prefixes=CHECK %s
; ModuleID = 'lgcPipeline'
source_filename = "lgcPipeline"
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-ni:7"
target triple = "amdgcn--amdpal"
; Function Attrs: nounwind
define dllexport spir_func void @lgc.shader.VS.main() local_unnamed_addr #0 !lgc.shaderstage !0 {
; CHECK-LABEL: define dllexport spir_func void @lgc.shader.VS.main(
; CHECK-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] !lgc.shaderstage [[META0:![0-9]+]] {
; CHECK-NEXT: [[_ENTRY:.*:]]
; CHECK-NEXT: [[TMP125:%.*]] = call i64 @llvm.amdgcn.s.getpc()
; CHECK-NEXT: [[TMP126:%.*]] = bitcast i64 [[TMP125]] to <2 x i32>
; CHECK-NEXT: [[TMP27:%.*]] = call i64 @llvm.amdgcn.s.getpc()
; CHECK-NEXT: [[TMP38:%.*]] = bitcast i64 [[TMP27]] to <2 x i32>
; CHECK-NEXT: [[TMP16:%.*]] = call i64 @llvm.amdgcn.s.getpc()
; CHECK-NEXT: [[TMP47:%.*]] = bitcast i64 [[TMP16]] to <2 x i32>
; CHECK-NEXT: [[TMP107:%.*]] = call i64 @llvm.amdgcn.s.getpc()
; CHECK-NEXT: [[TMP130:%.*]] = bitcast i64 [[TMP107]] to <2 x i32>
; CHECK-NEXT: [[TMP8:%.*]] = call i32 @lgc.load.user.data__i32(i32 0)
; CHECK-NEXT: [[TMP9:%.*]] = insertelement <2 x i32> [[TMP130]], i32 [[TMP8]], i64 0
; CHECK-NEXT: [[TMP10:%.*]] = bitcast <2 x i32> [[TMP9]] to i64
; CHECK-NEXT: [[TMP11:%.*]] = inttoptr i64 [[TMP10]] to ptr addrspace(4)
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP11]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP11]], i32 -1) ]
; CHECK-NEXT: [[DOTDESC_PTR:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP11]], i32 0
; CHECK-NEXT: [[TMP12:%.*]] = call i32 @lgc.load.user.data__i32(i32 0)
; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x i32> [[TMP47]], i32 [[TMP12]], i64 0
; CHECK-NEXT: [[TMP14:%.*]] = bitcast <2 x i32> [[TMP13]] to i64
; CHECK-NEXT: [[TMP15:%.*]] = inttoptr i64 [[TMP14]] to ptr addrspace(4)
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP15]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP15]], i32 -1) ]
; CHECK-NEXT: [[DOTSAMPLER_PTR:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP15]], i32 64
; CHECK-NEXT: [[TMP17:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5:![0-9]+]]
; CHECK-NEXT: [[TMP21:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP17]])
; CHECK-NEXT: [[TMP22:%.*]] = extractelement <8 x i32> [[TMP21]], i64 3
; CHECK-NEXT: [[TMP23:%.*]] = icmp sge i32 [[TMP22]], 0
; CHECK-NEXT: [[TMP24:%.*]] = and i32 [[TMP22]], 268435455
; CHECK-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i32 [[TMP24]], i32 [[TMP22]]
; CHECK-NEXT: [[TMP26:%.*]] = insertelement <8 x i32> [[TMP21]], i32 [[TMP25]], i64 3
; CHECK-NEXT: [[DOTLOAD:%.*]] = call <4 x float> @llvm.amdgcn.image.load.1d.v4f32.i32.v8i32(i32 15, i32 1, <8 x i32> [[TMP26]], i32 0, i32 0)
; CHECK-NEXT: [[TMP28:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP32:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP28]])
; CHECK-NEXT: [[TMP33:%.*]] = extractelement <8 x i32> [[TMP32]], i64 3
; CHECK-NEXT: [[TMP34:%.*]] = icmp sge i32 [[TMP33]], 0
; CHECK-NEXT: [[TMP35:%.*]] = and i32 [[TMP33]], 268435455
; CHECK-NEXT: [[TMP36:%.*]] = select i1 [[TMP34]], i32 [[TMP35]], i32 [[TMP33]]
; CHECK-NEXT: [[TMP37:%.*]] = insertelement <8 x i32> [[TMP32]], i32 [[TMP36]], i64 3
; CHECK-NEXT: call void @llvm.amdgcn.image.store.2d.v4f32.i32.v8i32(<4 x float> zeroinitializer, i32 15, i32 0, i32 0, <8 x i32> [[TMP37]], i32 0, i32 0)
; CHECK-NEXT: [[TMP30:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP40:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP30]])
; CHECK-NEXT: [[TMP41:%.*]] = extractelement <8 x i32> [[TMP40]], i64 3
; CHECK-NEXT: [[TMP42:%.*]] = icmp sge i32 [[TMP41]], 0
; CHECK-NEXT: [[TMP43:%.*]] = and i32 [[TMP41]], 268435455
; CHECK-NEXT: [[TMP44:%.*]] = select i1 [[TMP42]], i32 [[TMP43]], i32 [[TMP41]]
; CHECK-NEXT: [[TMP45:%.*]] = insertelement <8 x i32> [[TMP40]], i32 [[TMP44]], i64 3
; CHECK-NEXT: [[TMP39:%.*]] = load <4 x i32>, ptr addrspace(4) [[DOTSAMPLER_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[DOTSAMPLE:%.*]] = call <4 x float> @llvm.amdgcn.image.sample.2d.v4f32.f32.v8i32.v4i32(i32 15, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP45]], <4 x i32> [[TMP39]], i1 false, i32 0, i32 0)
; CHECK-NEXT: [[TMP54:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP48:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP54]])
; CHECK-NEXT: [[TMP49:%.*]] = extractelement <8 x i32> [[TMP48]], i64 3
; CHECK-NEXT: [[TMP50:%.*]] = icmp sge i32 [[TMP49]], 0
; CHECK-NEXT: [[TMP51:%.*]] = and i32 [[TMP49]], 268435455
; CHECK-NEXT: [[TMP52:%.*]] = select i1 [[TMP50]], i32 [[TMP51]], i32 [[TMP49]]
; CHECK-NEXT: [[TMP53:%.*]] = insertelement <8 x i32> [[TMP48]], i32 [[TMP52]], i64 3
; CHECK-NEXT: [[TMP46:%.*]] = load <4 x i32>, ptr addrspace(4) [[DOTSAMPLER_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[DOTGATHER:%.*]] = call <4 x float> @llvm.amdgcn.image.gather4.l.2d.v4f32.f32.v8i32.v4i32(i32 1, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP53]], <4 x i32> [[TMP46]], i1 false, i32 0, i32 0)
; CHECK-NEXT: [[TMP55:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP59:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP55]])
; CHECK-NEXT: [[TMP60:%.*]] = extractelement <8 x i32> [[TMP59]], i64 3
; CHECK-NEXT: [[TMP61:%.*]] = icmp sge i32 [[TMP60]], 0
; CHECK-NEXT: [[TMP62:%.*]] = and i32 [[TMP60]], 268435455
; CHECK-NEXT: [[TMP63:%.*]] = select i1 [[TMP61]], i32 [[TMP62]], i32 [[TMP60]]
; CHECK-NEXT: [[TMP64:%.*]] = insertelement <8 x i32> [[TMP59]], i32 [[TMP63]], i64 3
; CHECK-NEXT: [[DOTATOMIC:%.*]] = call i32 @llvm.amdgcn.image.atomic.add.1d.i32.i32.v8i32(i32 1, i32 0, <8 x i32> [[TMP64]], i32 0, i32 0)
; CHECK-NEXT: [[TMP56:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP67:%.*]] = call <8 x i32> @llvm.amdgcn.readfirstlane.v8i32(<8 x i32> [[TMP56]])
; CHECK-NEXT: [[TMP68:%.*]] = extractelement <8 x i32> [[TMP67]], i64 3
; CHECK-NEXT: [[TMP69:%.*]] = icmp sge i32 [[TMP68]], 0
; CHECK-NEXT: [[TMP70:%.*]] = and i32 [[TMP68]], 268435455
; CHECK-NEXT: [[TMP71:%.*]] = select i1 [[TMP69]], i32 [[TMP70]], i32 [[TMP68]]
; CHECK-NEXT: [[TMP72:%.*]] = insertelement <8 x i32> [[TMP67]], i32 [[TMP71]], i64 3
; CHECK-NEXT: [[TMP66:%.*]] = load <4 x i32>, ptr addrspace(4) [[DOTSAMPLER_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[DOTLOD:%.*]] = call <2 x float> @llvm.amdgcn.image.getlod.2d.v2f32.f32.v8i32.v4i32(i32 3, float 0.000000e+00, float 0.000000e+00, <8 x i32> [[TMP72]], <4 x i32> [[TMP66]], i1 false, i32 0, i32 0)
; CHECK-NEXT: [[TMP73:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP74:%.*]] = extractelement <8 x i32> [[TMP73]], i64 1
; CHECK-NEXT: [[TMP75:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP74]], i32 30, i32 2)
; CHECK-NEXT: [[TMP76:%.*]] = extractelement <8 x i32> [[TMP73]], i64 2
; CHECK-NEXT: [[TMP77:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP76]], i32 0, i32 12)
; CHECK-NEXT: [[TMP78:%.*]] = shl i32 [[TMP77]], 2
; CHECK-NEXT: [[TMP79:%.*]] = or i32 [[TMP78]], [[TMP75]]
; CHECK-NEXT: [[TMP80:%.*]] = add i32 [[TMP79]], 1
; CHECK-NEXT: [[TMP81:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP76]], i32 14, i32 14)
; CHECK-NEXT: [[TMP82:%.*]] = add i32 [[TMP81]], 1
; CHECK-NEXT: [[TMP83:%.*]] = extractelement <8 x i32> [[TMP73]], i64 4
; CHECK-NEXT: [[TMP84:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP83]], i32 0, i32 13)
; CHECK-NEXT: [[TMP85:%.*]] = add i32 [[TMP84]], 1
; CHECK-NEXT: [[TMP86:%.*]] = extractelement <8 x i32> [[TMP73]], i64 3
; CHECK-NEXT: [[TMP87:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP86]], i32 12, i32 4)
; CHECK-NEXT: [[TMP88:%.*]] = add nuw nsw i32 [[TMP87]], 0
; CHECK-NEXT: [[TMP89:%.*]] = lshr i32 [[TMP80]], [[TMP88]]
; CHECK-NEXT: [[TMP90:%.*]] = icmp eq i32 [[TMP89]], 0
; CHECK-NEXT: [[TMP91:%.*]] = select i1 [[TMP90]], i32 1, i32 [[TMP89]]
; CHECK-NEXT: [[TMP92:%.*]] = lshr i32 [[TMP82]], [[TMP88]]
; CHECK-NEXT: [[TMP93:%.*]] = icmp eq i32 [[TMP92]], 0
; CHECK-NEXT: [[TMP94:%.*]] = select i1 [[TMP93]], i32 1, i32 [[TMP92]]
; CHECK-NEXT: [[TMP95:%.*]] = insertelement <4 x i32> poison, i32 [[TMP91]], i64 0
; CHECK-NEXT: [[TMP96:%.*]] = insertelement <4 x i32> [[TMP95]], i32 [[TMP94]], i64 1
; CHECK-NEXT: [[TMP97:%.*]] = insertelement <4 x i32> [[TMP96]], i32 [[TMP85]], i64 2
; CHECK-NEXT: [[DOTQUERY_SIZE:%.*]] = shufflevector <4 x i32> [[TMP97]], <4 x i32> [[TMP97]], <2 x i32> <i32 0, i32 1>
; CHECK-NEXT: [[TMP98:%.*]] = load <8 x i32>, ptr addrspace(4) [[DOTDESC_PTR]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP99:%.*]] = extractelement <8 x i32> [[TMP98]], i64 3
; CHECK-NEXT: [[TMP100:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP99]], i32 16, i32 4)
; CHECK-NEXT: [[TMP101:%.*]] = call i32 @llvm.amdgcn.ubfe.i32(i32 [[TMP99]], i32 12, i32 4)
; CHECK-NEXT: [[TMP102:%.*]] = sub i32 [[TMP100]], [[TMP101]]
; CHECK-NEXT: [[DOTQUERY_LEVELS:%.*]] = add i32 [[TMP102]], 1
; CHECK-NEXT: [[LANE:%.*]] = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0)
; CHECK-NEXT: [[OFS:%.*]] = mul i32 [[LANE]], 32
; CHECK-NEXT: [[TMP103:%.*]] = call i32 @lgc.load.user.data__i32(i32 0)
; CHECK-NEXT: [[TMP104:%.*]] = insertelement <2 x i32> [[TMP38]], i32 [[TMP103]], i64 0
; CHECK-NEXT: [[TMP105:%.*]] = bitcast <2 x i32> [[TMP104]] to i64
; CHECK-NEXT: [[TMP106:%.*]] = inttoptr i64 [[TMP105]] to ptr addrspace(4)
; CHECK-NEXT: call void @llvm.assume(i1 true) [ "align"(ptr addrspace(4) [[TMP106]], i32 4), "dereferenceable"(ptr addrspace(4) [[TMP106]], i32 -1) ]
; CHECK-NEXT: [[DOTDESC2_PTR2:%.*]] = getelementptr i8, ptr addrspace(4) [[TMP106]], i32 32
; CHECK-NEXT: [[DOTDESC2_PTR0:%.*]] = getelementptr i8, ptr addrspace(4) [[DOTDESC2_PTR2]], i32 [[OFS]]
; CHECK-NEXT: [[TMP108:%.*]] = ptrtoint ptr addrspace(4) [[DOTDESC2_PTR0]] to i32
; CHECK-NEXT: [[TMP109:%.*]] = call i32 @llvm.amdgcn.waterfall.begin.i32(i32 0, i32 [[TMP108]])
; CHECK-NEXT: [[TMP110:%.*]] = call i32 @llvm.amdgcn.waterfall.readfirstlane.i32.i32(i32 [[TMP109]], i32 [[TMP108]])
; CHECK-NEXT: [[TMP111:%.*]] = insertelement <2 x i32> [[TMP126]], i32 [[TMP110]], i64 0
; CHECK-NEXT: [[TMP112:%.*]] = bitcast <2 x i32> [[TMP111]] to i64
; CHECK-NEXT: [[TMP113:%.*]] = inttoptr i64 [[TMP112]] to ptr addrspace(4)
; CHECK-NEXT: [[TMP114:%.*]] = load <8 x i32>, ptr addrspace(4) [[TMP113]], align 4, !invariant.load [[META5]]
; CHECK-NEXT: [[TMP115:%.*]] = extractelement <8 x i32> [[TMP114]], i64 3
; CHECK-NEXT: [[TMP116:%.*]] = icmp sge i32 [[TMP115]], 0
; CHECK-NEXT: [[TMP117:%.*]] = and i32 [[TMP115]], 268435455
; CHECK-NEXT: [[TMP118:%.*]] = select i1 [[TMP116]], i32 [[TMP117]], i32 [[TMP115]]
; CHECK-NEXT: [[TMP119:%.*]] = insertelement <8 x i32> [[TMP114]], i32 [[TMP118]], i64 3
; CHECK-NEXT: [[TMP120:%.*]] = call <8 x i32> @llvm.amdgcn.waterfall.last.use.v8i32(i32 [[TMP109]], <8 x i32> [[TMP119]])
; CHECK-NEXT: call void @llvm.amdgcn.image.store.1d.v4f32.i32.v8i32(<4 x float> zeroinitializer, i32 15, i32 0, <8 x i32> [[TMP120]], i32 0, i32 0)
; CHECK-NEXT: ret void
;
.entry:
%.desc.ptr = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i32 3, i32 3)
%.sampler.ptr = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 2, i32 2, i32 0, i32 13)
%.load = call <4 x float> (...) @lgc.create.image.load.v4f32(i32 0, i32 128, ptr addrspace(4) %.desc.ptr, i32 1)
call void (...) @lgc.create.image.store(<4 x float> zeroinitializer, i32 1, i32 128, ptr addrspace(4) %.desc.ptr, <2 x i32> zeroinitializer)
%.sample = call <4 x float> (...) @lgc.create.image.sample.v4f32(i32 1, i32 128, ptr addrspace(4) %.desc.ptr, ptr addrspace(4) %.sampler.ptr, i32 1, <2 x float> zeroinitializer)
%.gather = call <4 x float> (...) @lgc.create.image.gather.v4f32(i32 1, i32 128, ptr addrspace(4) %.desc.ptr, ptr addrspace(4) %.sampler.ptr, i32 37, <2 x float> zeroinitializer, i32 0, float 0.000000e+00)
%.atomic = call i32 (...) @lgc.create.image.atomic.i32(i32 2, i32 0, i32 128, i32 0, ptr addrspace(4) %.desc.ptr, i32 0, i32 1) #0
%.lod = call <2 x float> (...) @lgc.create.image.get.lod.v2f32(i32 1, i32 128, ptr addrspace(4) %.desc.ptr, ptr addrspace(4) %.sampler.ptr, <2 x float> zeroinitializer)
%.query.size = call <2 x i32> (...) @lgc.create.image.query.size.v2i32(i32 1, i32 128, ptr addrspace(4) %.desc.ptr, i32 0)
%.query.levels = call i32 (...) @lgc.create.image.query.levels.i32(i32 1, i32 128, ptr addrspace(4) %.desc.ptr)
%lane = call i32 @llvm.amdgcn.mbcnt.lo(i32 -1, i32 0) ; just some source of divergence
%ofs = mul i32 %lane, 32
; Use a waterfall loop with last.use to test that is also handled correctly
%.desc2.ptr2 = call ptr addrspace(4) (...) @lgc.create.get.desc.ptr.p4(i32 1, i32 1, i32 3, i32 4)
%.desc2.ptr0 = getelementptr i8, ptr addrspace(4) %.desc2.ptr2, i32 %ofs
call void (...) @lgc.create.image.store(<4 x float> zeroinitializer, i32 0, i32 8, ptr addrspace(4) %.desc2.ptr0, i32 zeroinitializer)
ret void
}
declare ptr addrspace(4) @lgc.create.get.desc.ptr.p4(...) #1
declare <4 x float> @lgc.create.image.load.v4f32(...) #1
declare void @lgc.create.image.store(...) #2
declare <4 x float> @lgc.create.image.sample.v4f32(...) #1
declare <4 x float> @lgc.create.image.gather.v4f32(...) #1
declare i32 @lgc.create.image.atomic.i32(...) #0
declare <2 x float> @lgc.create.image.get.lod.v2f32(...) #0
declare <2 x i32> @lgc.create.image.query.size.v2i32(...) #0
declare i32 @lgc.create.image.query.levels.i32(...) #0
declare i32 @llvm.amdgcn.mbcnt.lo(i32, i32)
attributes #0 = { nounwind }
attributes #1 = { nounwind readonly }
attributes #2 = { nounwind writeonly }
!0 = !{i32 1}
!lgc.unlinked = !{!0}
!lgc.user.data.nodes = !{!1,!2,!3,!4}
!1 = !{!"DescriptorTableVaPtr", i32 0, i32 0, i32 0, i32 1, i32 3}
!2 = !{!"DescriptorResource", i32 1, i32 0, i32 0, i32 8, i32 3, i32 3, i32 8}
!3 = !{!"DescriptorResource", i32 1, i32 0, i32 8, i32 8, i32 3, i32 4, i32 8}
!4 = !{!"DescriptorSampler", i32 2, i32 0, i32 16, i32 4, i32 0, i32 13, i32 4}
; GFX1010: [[META0]] = !{i32 1}
; GFX1010: [[META5]] = !{}
;.
; CHECK: [[META0]] = !{i32 1}
; CHECK: [[META5]] = !{}
;.