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 *********************************************************************
 * 文件名：tspi-rk3566-dsi-v10.dtsi
 * 描述：mipi 屏幕
 * 更新:
 * 时间          作者           联系           说明
 * 2023-09-13   吴才成    1378913492@qq.com   v1.0.0
 * 2024-01-19   风漠兮    578118086@qq.com    Fit D310T9362V1
 *********************************************************************/
/ {
	backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm14 0 25000 0>;
		brightness-levels = <
			  0 20 20 20 20 20 20 20
			  21 21 21 21 21 21 21 21
			  22 22 22 22 22 22 22 22
			  23 23 23 23 23 23 23 23
			  24 24 24 24 24 24 24 24
			  25 25 25 25 25 25 25 25
			  26 26 26 26 26 26 26 26
			  27 27 27 27 27 27 27 27
			  28 28 28 28 28 28 28 28
			  29 29 29 29 29 29 29 29
			  30 30 30 30 30 30 30 30
			  31 31 31 31 31 31 31 31
			  32 32 32 32 32 32 32 32
			  33 33 33 33 33 33 33 33
			  34 34 34 34 34 34 34 34
			  35 35 35 35 35 35 35 35
			  36 36 36 36 36 36 36 36
			  37 37 37 37 37 37 37 37
			  38 38 38 38 38 38 38 38
			  39 39 39 39 39 39 39 39
			  40 40 40 40 40 40 40 40
			  41 41 41 41 41 41 41 41
			  42 42 42 42 42 42 42 42
			  43 43 43 43 43 43 43 43
			  44 44 44 44 44 44 44 44
			  45 45 45 45 45 45 45 45
			  46 46 46 46 46 46 46 46
			  47 47 47 47 47 47 47 47
			  48 48 48 48 48 48 48 48
			  49 49 49 49 49 49 49 49
			  50 50 50 50 50 50 50 50
			  51 51 51 51 51 51 51 51
			  256
		>;
		default-brightness-level = <192>;
		enable-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>;
	};
};

// pwm not used, backlight handled manually
&pwm14 {
	status = "disabled";
};

&pinctrl {
	dsi1 {
		dsi1_rst_gpio: dsi1-rst-gpio {
			rockchip,pins = <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>;
		};
	};
};

/*
 * video_phy1 needs to be enabled
 * when dsi1 is enabled
 */
&dsi1 {
	status = "okay";
};

&dsi1_in_vp0 {
	status = "disabled";
};

&dsi1_in_vp1 {
	status = "okay";
};

&video_phy1 {
	status = "okay";
};

&route_dsi1 {
	status = "okay";//wucaicheng mipi okay
	connect = <&vp1_out_dsi1>;
};

// D310T9362V1
&dsi1 {
	status = "okay";
	rockchip,lane-rate = <240>;//(480+50+60+10)*(800+20+34+2)*60*3*8/2,+100mhz
	dsi1_panel: panel@0 {
		status = "okay";
		compatible = "simple-panel-dsi";
		reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>;
		pinctrl-names = "default";
		pinctrl-0 = <&dsi1_rst_gpio>;
		reg = <0>;
		backlight = <&backlight>;
		reset-delay-ms = <200>;
		enable-delay-ms = <150>;
		prepare-delay-ms = <20>;
		unprepare-delay-ms = <20>;
		disable-delay-ms = <20>;
		init-delay-ms = <120>;
		dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
			MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>;
		dsi,format = <MIPI_DSI_FMT_RGB888>;
		dsi,lanes  = <2>;
		panel-init-sequence = [
			// init code by huadichuangxian
			39 0A 06 FF 77 01 00 00 13
			15 0A 02 EF 08
			39 0A 06 FF 77 01 00 00 10
			39 0A 03 C0 2C 00
			39 0A 03 C1 0D 02
			39 0A 03 C2 31 05
			15 0A 02 CC 10
			39 0A 11 B0 0A 14 1B 0D 10 05 07 08 06 22 03 11 10 AD 31 1B
			39 6E 11 B1 0A 14 1B 0D 10 05 07 08 06 22 03 11 10 AD 31 1B
			39 0A 06 FF 77 01 00 00 11
			15 0A 02 B0 50
			15 0A 02 B1 5E
			15 0A 02 B2 87
			15 6E 02 B3 80
			15 0A 02 B5 47
			15 0A 02 B7 85
			15 0A 02 B8 21
			15 0A 02 C1 78
			15 0A 02 C2 78
			15 0A 02 D0 88
			15 0A 02 E0 00
			15 0A 02 1B 02
			39 0A 0C E1 08 A0 00 00 07 A0 00 00 00 44 44
			39 0A 0D E2 11 11 44 44 75 A0 00 00 74 A0 00 00
			39 0A 05 E3 00 00 11 11
			39 0A 03 E4 44 44
			39 0A 11 E5 0A 71 D8 A0 0C 73 D8 A0 0E 75 D8 A0 10 77 D8 A0
			39 0A 05 E6 00 00 11 11
			39 0A 03 E7 44 44
			39 0A 11 E8 09 70 D8 A0 0B 72 D8 A0 0D 74 D8 A0 0F 76 D8 A0
			39 0A 08 EB 02 00 E4 E4 88 00 40
			39 0A 03 EC 3C 00
			39 0A 11 ED AB 89 76 54 02 FF FF FF FF FF FF 20 45 67 98 BA
			39 0A 07 EF 08 08 08 45 3F 54
			39 0A 06 FF 77 01 00 00 13
			39 0A 03 E8 00 0E
			05 78 01 11     
			39 0A 03 E8 00 0C
			39 0A 03 E8 00 00
			39 0A 06 FF 77 01 00 00 00        
			05 14 01 29		
		];

		panel-exit-sequence = [
			05 00 01 28
			05 00 01 10
		];

		disp_timings1: display-timings {
			native-mode = <&dsi1_timing0>;
			dsi1_timing0: timing0 {
				clock-frequency = <15000000>;// (480+48+43+10)*(360+18+28+10)*60

				hactive = <480>;
				hfront-porch = <48>;
				hback-porch = <43>;
				hsync-len = <10>;

				vactive = <360>;
				vfront-porch = <18>;
				vback-porch = <28>;
				vsync-len = <10>;

				hsync-active = <0>;
				vsync-active = <0>;
				de-active = <0>;
				pixelclk-active = <0>;

				swap-rb = <0>;
				swap-rg = <0>;
				swap-gb = <0>;
			};
		};

		ports {
			#address-cells = <1>;
			#size-cells = <0>;

			port@0 {
				reg = <0>;
				panel_in_dsi1: endpoint {
					remote-endpoint = <&dsi1_out_panel>;
				};
			};
		};
	};

	ports {
		#address-cells = <1>;
		#size-cells = <0>;

		port@1 {
			reg = <1>;
			dsi1_out_panel: endpoint {
				remote-endpoint = <&panel_in_dsi1>;
			};
		};
	};

};